Abstract: A 1.3–4-GHz quadrature-phase digital delay-locked loop (DDLL) with sequential delay control and a reconfigurable delay line is designed using a 28 nm CMOS process. The time resolution of the ...

Abstract: Contribution: This study identifies the types of interaction that contribute to student learning with student-led tutorials (SLTs). The quality of these interactions include peer discussion, ...

This library implements the ICOM CI-V CAT protocol emulating an IC-746 transceiver. The library has been tested on a homebrew transceiver of my creation. It has been demonstrated to work with an ...